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Module convolutional

Module convolutional 

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Convolutional code (rate 1/2, K=7) with Viterbi decoding (CCSDS 131.0-B-5). CCSDS Convolutional Code (Rate 1/2, K=7) with Viterbi Decoding

Implements the convolutional code specified in CCSDS 131.0-B-5 (TM Synchronization and Channel Coding).

§Parameters

  • Constraint length: K = 7 (64 encoder states)
  • Code rate: 1/2 (2 output symbols per input bit)
  • Generator polynomials: G1 = 171₈ (0x79), G2 = 133₈ (0x5B)
  • Tail: K−1 = 6 zero bits flush the encoder to state 0

§Encoding

Each input bit plus the 6-bit shift register state produces two coded symbols (G1 first, then G2). After all data bits, six zero tail bits terminate the trellis at state 0.

§Decoding

Soft-decision Viterbi algorithm with i16 LLR inputs (positive means bit 0 is more likely), matching the LDPC decoder convention. Uses a sliding-window traceback (depth 5K = 35) to bound stack usage regardless of frame length.

Structs§

ConvolutionalEncoder
Convolutional encoder implementing FecEncoder.
ViterbiDecoder
Hard-decision Viterbi decoder implementing FecDecoder.

Enums§

ConvError
Errors from convolutional coding operations.

Constants§

K
Constraint length.

Functions§

decode
Decodes a convolutionally coded frame using soft-decision Viterbi.
encode
Encodes data using the rate-1/2, K=7 convolutional code.
encoded_len
Returns the number of encoded bytes for data_len data bytes.
hard_to_llr
Converts hard bits (packed bytes, MSB-first) to LLR values.